The invention relates to a signal processing apparatus for point to point or point to multipoint communication between external units connected to the signal processing apparatus with very low latency.
An apparatus for point to point or point to multipoint communication can receive and transmit signals. For this purpose, a conventional apparatus comprises bidirectional ports which are used to connect external units to the apparatus. These external units can comprise client devices or network devices of a network. Each bidirectional port of such a conventional apparatus can comprise a transmission port to transmit signals to the respective unit and a reception port to receive a signal from the external unit. The bidirectional ports can be connected to serializer/deserializer circuits which are adapted to deserialize a serial signal received by the reception port of the bidirectional port from the connected external unit to generate an internal parallel signal and to serialize an internal parallel signal to generate a serial signal transmitted from the transmission port of the respective bidirectional port. The serializer/deserializer circuit performs a conversion of data between serial data and parallel data comprising interfaces in both directions. The deserialized data stream comprising an internal parallel signal can be applied to an internal signal processing block or functional block of the apparatus for data processing.
FIG. 2 shows a block diagram of a conventional apparatus comprising ports for connecting external units or external devices to the apparatus. The conventional apparatus illustrated in FIG. 2 comprises two bidirectional ports, wherein a first port is provided for connecting a network device of a network to the apparatus, and wherein the second port is provided for connecting a client device to the apparatus. Each bidirectional port comprises a reception port for receiving a serial reception signal rx from the connected device and a transmission port for transmitting a serial signal tx to the respective connected device. The reception port and the transmission port of each bidirectional port are connected to a serializer/deserializer circuit SerDes which transforms the received serial reception signal into an internal parallel signal provided to an internal functional block of the apparatus. Similarly the internal functional block can provide a parallel signal to the SerDes which transforms that internal parallel signal into a serial signal transmitted by the transmission port to the connected external unit or device. As shown in FIG. 2, the reception ports of both bidirectional ports comprise a clock and data recovery circuit CDR which receives the serial reception signal rx and which supplies the serializer/deserializer circuit SerDes with the recovered clock signal and with the recovered serial reception signal. Further, each bidirectional port comprises an internal loopback signal path lb which is adapted to loop in a test mode a signal received by its reception port back to the respective device via its transmission port as illustrated in FIG. 2. In the test mode, the signal transmitted by an external unit or device is looped directly back to the respective device for test purposes, i.e. data traffic originating from a sending source device is directly looped back to the sending source device.
In specific situations, it is desired to transport a signal from one external device connected to a first bidirectional port of the apparatus to another external device connected to another bidirectional port of the apparatus with a low latency. FIG. 3 shows a block diagram illustrating the operation of a conventional apparatus in a low latency operation mode. In FIG. 3, a network device is connected to a bidirectional network port of the apparatus and a client device is connected to a bidirectional client port of the apparatus. In the low latency mode of the apparatus, the output of the serializer/deserializer circuit within the bidirectional network port is directly connected to the corresponding serializer/deserializer circuit within the bidirectional client port as shown in FIG. 3. In the same way, the output of the serializer/deserializer circuit of the bidirectional client port is directly connected to the serializer/deserializer circuit within the bidirectional network port. The functional block does only tap the forwarded signal and does not increase the signal latency, however, in a conventional apparatus, as illustrated in FIG. 3, even in the low latency mode, the received signal still has to pass through the serializer/deserializer circuits of both bidirectional ports so that the signal latency of the forwarded signal cannot be lower than the signal latency caused by both serializer/deserializer circuits of the bidirectional ports. Accordingly, in the low latency mode of a conventional apparatus, internal functional blocks or internal logic circuits of the apparatus are bypassed, for instance by means of internal multiplexing circuits, however, a conversion of the signal between the serial and parallel domains has still to be performed incurring a significant signal latency within the apparatus.
Accordingly, it is an object of the present invention to provide an apparatus which allows to further reduce the signal latency in a low latency operation mode without increasing the complexity of the apparatus.